2020年07月25日 16:08 新京报网
新京报记者 樊朔 校对 刘军
The RISC-V organization maintains a list of RISC-V CPU and SoC implementations.
Existing commercial implementations include:
- Alibaba Group, in July 2019 announced the 2.5 GHz 16-core 64-bit (RV64GCV) XuanTie 910 out-of-order processor, the fastest RISC-V processor to date
- Andes Technology Corporation, a founding member of RISC-V International which joined the consortium in 2016, released its first two RISC-V cores in 2017. The cores, the N25 and NX25, come with a complete design ecosystems and a number of RISC-V partners. Andes is actively driving the development of RISC-V ecosystem and expects to release several new RISC-V products in 2018.
- CloudBEAR is a processor IP company that develops its own RISC-V cores for a range of applications.
- Codasip and UltraSoC have developed fully supported intellectual property for RISC-V embedded SOCs that combine Codasip's RISC-V cores and other IP with UltraSoC's debug, optimization and analytics.
- Cortus, a founding platinum member of the RISC-V foundation, has a number of RISC-V implementations and a complete IDE/toolchain/debug eco-system which it offers for free as part of its SoC design business.
- GigaDevice has a series of MCUs based on RISC-V (RV32IMAC, GD32V series), with one of them used on the Longan Nano board produced by a Chinese electronic company Sipeed.
- GreenWaves Technologies announced the availability of GAP8, a 32-bit 1 controller plus 8 compute cores, 32-bit SoC (RV32IMC) and developer board in February 2018. Their GAPuino GAP8 development board started shipping in May 2018.
- IAR Systems released the first version of IAR Embedded Workbench for RISC-V, which supports RV32 32-bit RISC-V cores and extensions in the first version. Future releases will include 64-bit support and support for the smaller RV32E base instruction set, as well as functional safety certification and security solutions.
- Instant SoC RISC-V cores from FPGA Cores. System On Chip, including RISC-V cores, defined by C++.
- SEGGER added support for RISC-V cores to their debug probe J-Link, their integrated development environment Embedded Studio, and their RTOS embOS and embedded software.
- SiFive, a company established specifically for developing RISC-V hardware, has processor models released in 2017. These include a quad-core, 64-bit (RV64GC) system on a chip (SoC) capable of running general-purpose operating systems such as Linux.
- Syntacore, a founding member of RISC-V International and one of the first commercial RISC-V IP vendors, develops and licenses family of RISC-V IP since 2015. As of 2018, product line includes eight 32- and 64-bit cores, including open-source SCR1 MCU core (RV32I/E[MC]). First commercial SoCs, based on the Syntacore IP were demonstrated in 2016.
- UltraSOC proposed a standard trace system and donated an implementation.
- Western Digital, in December 2018 announced an RV32IMC core called SweRV. The SweRV features an in-order 2-way superscalar and nine-stage pipeline design. WD plans to use SweRV based processors in their flash controllers and SSDs, and released it as open-source to third parties in January 2019.
- Espressif added a RISC-V ULP coprocessor to their ESP32-S2 microcontroller.
在研 In development
- ASTC developed a RISC-V CPU for embedded ICs.
- Centre for Development of Advanced Computing, India (C-DAC) is developing a 64-bit out-of-order quad-core RISC-V processor.
- Cobham Gaisler NOEL-V 64-bit. 
- Computer Laboratory, University of Cambridge, in collaboration with the FreeBSD Project, has ported that operating system to 64-bit RISC-V to use as a hardware-software research platform.
- Esperanto Technologies announced that they are developing three RISC-V based processors: the ET-Maxion high-performance core, ET-Minion energy-efficient core, and ET-Graphics graphics processor.
- ETH Zurich and the University of Bologna have cooperatively developed the open-source RISC-V PULPino processor as part of the Parallel Ultra-Low Power (PULP) project for energy-efficient IoT computing.
- European Processor Initiative (EPI), RISC-V Accelerator Stream.
- Indian Institute of Technology Madras is developing six RISC-V open-source CPU designs for six distinct uses, from a small 32-bit CPU for the Internet of Things (IoT) to large, 64-bit CPUs designed for warehouse-scale computers such as server farms based on RapidIO and Hybrid Memory Cube technologies.
- lowRISC is a non profit project to implement a fully open-source hardware system on a chip (SoC) based on the 64-bit RISC-V ISA.
- Nvidia plans to use RISC-V to replace their Falcon processor on their GeForce graphics cards.
- SiFive announced their first RISC-V out-of-order high performance CPU core, the U8 Series Processor IP.